High-end FPGAs begin to penetrate traditional DSP applications

Although the DSP's operating clock frequency has been increased to GHz, it is used for high-end applications that require very high digital sample processing rates (such as radar and sonar signal processing systems that require 1024-tap FIR/IIR filters and 1024-dot FFT) That said, DSP still can not meet the real-time requirements of the system. According to Jan Rabaey, an industrial analyst at market research firm BWRC, there has been a gap between algorithmic complexity and traditional DSP performance since the 1970s. In recent years, the rapid development of SD/HD video, radar, WiMAX, OFDM, MIMO, UWB, 3G, imaging, SDR (Software Radio), and 4G technologies and applications has also raised higher and higher requirements for system processing performance. The complexity of the required algorithm also rises linearly, making this gap appear to further expand.

Traditionally, this drop has been filled by a dedicated signal processing chip ASIC or ASSP (such as an FFT dedicated chip). Now, as FPGA performance increases, cost and power consumption decrease, and development tools improve, FPGAs begin to use the role of preprocessors and coprocessors to subdivide the $2 billion signal processing that this DSP cannot yet cover. Market penetration, and the market outlook is becoming more and more bright. This is mainly because the longer time to market for ASICs and ASSPs and more and more expensive development costs have made it difficult to meet the requirements of customers adapting to a market in which both technologies and standards are constantly changing, while FPGAs provide flexibility and superior parallel signals. Processing power, shorter time-to-market, and progressively more complete software development tools can meet this requirement.

Omit Tahernia: FPGA ratio
DSP is more suitable for multi-channel audio/video applications that require very high real-time performance.

Although FPGAs are increasingly used to implement glue logic and new peripherals or bus interfaces in digital systems, they are increasingly replacing traditional ASICs or ASSPs as DSPs in high-performance real-time audio, video and imaging applications. Preprocessor or coprocessor to improve the system's digital signal processing capabilities.

Francis Kua, marketing manager for DSP products at Xilinx in Asia Pacific, said that the most powerful GHz-class DSPs currently have the ability to handle 1 to 6 video channels (depending on format and data width). If a user wants to increase the channel density, he will have to use multiple DSPs. On the other hand, a Virtex FPGA device can achieve 32 channels of audio and video decoding tasks, while the most powerful DSP can only achieve 4 channels.

In general, a DSP can be used alone to process QCIF, CIF, D1, SD resolution JPEG, MPEG-2, H.263, MPEG-4, H.264 video encoding or decoding tasks of about 4 channels, but When the system needs to process more than four channels at the same time or need to achieve HD resolution, as well as the above standard codec tasks, it is best to use DSP + FPGA solutions.

However, in the field of multichannel high-performance real-time audio and video and imaging applications, FPGAs have shown a trend to replace DSPs. This is because more and more users have discovered that a single DSP cannot meet the requirements of multi-channel real-time audio and video processing in terms of processing capabilities. At this point, one option is to use multiple DSP solutions, but this will increase cost, power consumption, PCB board size, and design complexity. Another option is to abandon the DSP and instead use an FPGA solution with better digital signal processing capabilities.

"For high-performance real-time video applications, FPGAs are better suited to act as coprocessors for DSPs," said Omit Tahernia, vice president and general manager of the newly established DSP division of Xilinx. "But for multi-channels that require very high real-time performance." For audio/video applications, FPGAs are more appropriate, because FPGAs now perform better than DSPs for the cost per channel required.

He went on to say: “Wireless and wired communication infrastructure devices (such as 3G/4G base stations and cable TV repeaters), and multimedia audio and video and image processing equipment (such as audio and video broadcasting equipment and home gateways) have become Xilinx high-end FPGAs. The two largest application markets, followed by military applications (such as real-time demanding radar and sonar signal processing systems) and other applications (such as graphic image testing and measurement instruments), in China, wireless communications The basic equipment has risen to the largest application market."

Most of these applications require multi-channel real-time data processing capabilities and high complexity algorithms such as H.264, SD/HD AVC SD, MPEG-4, WMV9, etc., and this is where high-end FPGAs come in handy. And no matter how these standards or algorithms evolve, neither device developers nor end users need to increase their hardware investment.

High-end FPGAs are currently targeted at multi-channel real-time audio/video and image processing applications that require very high performance. Currently two major FPGA vendors have introduced DSP performance-enhanced FPGAs for these application markets. For example, Altera's largest Stratix II device EP2S180 contains 96 DSP blocks, which provides data throughput of up to 173 GMACS and support at 450 MHz. Simultaneously perform up to 384 18 × 18 multiplications; Xilinx's latest generation Virtex-4 SX55 can provide 256 GMACS of data throughput, support simultaneous up to 512 18 × 18 multiply and 48-bit accumulations at frequencies up to 500 MHz, and Compared with competing FPGAs that also use a 90-nanometer process, static power consumption can be reduced by 76%, and dynamic power consumption of the MAC function can be reduced by 20%.

Whether it is Stratix II or Virtex-4 FPGAs, they can all be used to implement complete DSP systems that require very high digital signal processing throughput, but of course they can also be used as co-processors in DSP applications to accelerate critical system performance. DSP functions (such as WM9, CDMA2000, 1x EV-DV, HSDPA, echo cancellation, digital equalization, FIR filtering, FFT, WCDMA, and WiMAX) that do not consume most of the processing if implemented with a host DSP processor The ability to reduce the overall system performance.

The Xilinx Virtex-4 SX family of FPGAs is an ideal coprocessor for programmable DSPs. Currently, Virtex series FPGAs have been used in digital pre-distortion processing and crest factor reduction applications in tens of thousands of base station products worldwide. The cost performance of the SX35 and SX55 is comparable or exceeds that of the ASIC/ASSP, and its unique 'micropower' architecture allows each XtremeDSP block to consume only 2.3mW at a 100MHz operating frequency.

The Virtex-4 SX35/55 FPGA supports 16-bit and 32-bit floating-point 18x18 MAC operations and supports most DSP algorithms and major DSP design tools that have been validated in the industry, such as Xilinx's recently in its DSP IP library. Added the DVB FEC encoder core and the System Generator for DSP v7.1 development tool and XtremeDSP development kit for digital communications system design.

System Generator for DSP v7.1 provides a complete development environment from system modeling to hardware verification. It can complete system design and modeling with tools such as Simulink, MATLAB, AccelChip, ModelSim, ISE 7.1, and Platform Studio (EDK). , Algorithm development, HDL generation and co-simulation, design hardware verification, and debugging, making it easier for system and DSP designers to implement high sample rate or multi-channel signal processing designs on SX series devices.

System Generator for DSP v7.1 and the XtremeDSP Development Kit together enable the design and implementation of systems that include many of the latest developments in Xilinx wireless algorithms for 3G and 4G base stations, including RACH, HSDPA, DUC, and DDC.

Power consumption is another important issue that system developers care about. Although the current power consumption of a single FPGA is generally higher than that of a DSP, the power consumption problem needs to be viewed from a system or a dynamic point of view. Because DSP improves performance by increasing the clock frequency (currently up to 1 GHz), and FPGAs improve performance mainly due to the parallelism of their internal structure (currently the highest FPGA clock frequency is 500 MHz), FPGAs and DSPs that achieve the same processing performance are The difference in power consumption will not be too great. Omit Tahernia also pointed out: "In general, when dealing with the same signal processing tasks on more than four channels, the average power consumption per channel FPGA is better than DSP."


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